2021 · 35 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringDigital CommunicationMicroelectronicsSystem-on-chip DesignCmos Circuit DesignIntegrated Circuit DesignInterconnect ArchitectureInterconnect DesignMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsCapacitanceHigh-speed Cmos DesignHigh-speed InterconnectsOutput SwingTransceiver ArchitecturesTransceiver DesignTransmitter DesignTransmitter Front-ends
The ever-expanding demand for ultra-high-speed interconnects has driven the development of wireline TXs operating at >100Gb/s per lane [1]-[4]. This paper presents a PAM-4 TX achieving 200Gb/s with improved output bandwidth and output swing by minimizing the driver capacitance with pull-up current sources, multiplexing with flexible clock timing control, and employing a fully reconfigurable 5-tap FFE architecture.
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BAG2: A process-portable framework for generator-based AMS circuit design
Eric Chang, Jaeduk Han, Woorham Bae et al. · 2018 · 125 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 112Gb/S 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS
Christian Menolfi, Thomas Toifl, Matthias Bräendli et al. · 2018 · 81 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +17
A 112Gb/s PAM-4 transmitter with 3-Tap FFE in 10nm CMOS
Jihwan Kim, Ajay Balankutty, Rajeev Dokania et al. · 2018 · 64 citations