Kwanseo Park

A 7.6 mW, 414 fs RMS-Jitter 10 GHz Phase-Locked Loop for a 40 Gb/s Serial Link Transmitter Based on a Two-Stage Ring Oscillator in 65 nm CMOS

Woorham Bae, Haram Ju, Kwanseo Park et al. · IEEE Journal of Solid-State Circuits · 2016 · 59 citations

Two-stage Ring Oscillator, Engineering, Radio Frequency +12

A 0.1-pJ/b/dB 1.62-to-10.8-Gb/s Video Interface Receiver With Jointly Adaptive CTLE and DFE Using Biased Data-Level Reference

Jinhyung Lee, Kwang‐Ho Lee, Hyo‐Jun Kim et al. · IEEE Journal of Solid-State Circuits · 2020 · 52 citations

Digital Multimedia Broadcasting, Adaptive Filter, Engineering +15

A 6.7–11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS

Kwanseo Park, Woorham Bae, Jinhyung Lee et al. · IEEE Journal of Solid-State Circuits · 2018 · 46 citations

Oversampling Pfd, Engineering, Clock Recovery +13

A 4–20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS

Kwanseo Park, Kwang‐Ho Lee, Sung‐Yong Cho et al. · IEEE Journal of Solid-State Circuits · 2020 · 45 citations

Continuous-rate Referenceless Clock, Prototype Cdr Circuit, Cdr Circuit +8

An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS

Zhongkai Wang, Minsoo Choi, Kyoungtae Lee et al. · IEEE Journal of Solid-State Circuits · 2021 · 40 citations · Full text

Electrical Engineering, Berkeley Analog Generator, Engineering +12