A Versatile 200-V Capacitor-Coupled Level Shifter for Fully Floating Multi-MHz Gate Drivers

Abstract

This brief presents a novel level-shifter circuit for high-frequency high-voltage (HV) gate-drives. The proposed level shifter (LS) is designed based on a capacitive-coupler/current mirror/ latch structure which helps to extend operation voltage of a floating supply into the negative range, achieves sub-ns and constant delay, and consumes very low power from the floating supply. Additionally, common-mode noise cancellers based on a cross-current mirror and transmission gates are also presented to enhance the dV/dt immunity of the LS against slewing of the floating ground. Implemented in 0.18 μm HV BCD-on-SOI (bipolar-CMOS-DMOS on silicon-on-isolator) process, the post-layout simulation of the proposed design shows a delay of 680 ps, 200 V/ns of dV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SSF</sub> /dt slew rate immunity, It dissipates no static power and only 8.1 pJ/transition from the floating supply, improving FoM <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> and FoM <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of the proposed LS by 3 times and 11.7 times compared to respective state-of-the-art works.