Level Shifter Design
Level Shifter Design is a circuit design methodology that enables bidirectional or unidirectional voltage level translation between incompatible logic domains in multi-voltage systems while preserving signal integrity and minimizing power consumption.
186
Publications
6.5K
Citations
661
Authors
193
Institutions
Publications per year
2017–2026
45
Parents
186
Pushing ASIC performance in a power envelope
Ruchir Puri, Leon Stok, John Cohn et al. · 2003 · 133 citations
Engineering, Computer Engineering, Electrical Engineering +17
1–5 of 186
661
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1–5 of 661
193
Samsung (South Korea)
Seoul, South Korea
7 h-index
27 publications
681 citations

National Taiwan University
Taipei, Taiwan
6 h-index
18 publications
732 citations

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
5 h-index
12 publications
642 citations
IBM (United States)
Armonk, United States
5 h-index
17 publications
930 citations

University of Calabria
Rende, Italy
5 h-index
17 publications
1.3K citations
Institute of Microelectronics
Beijing, China
4 h-index
17 publications
403 citations
University of Michigan
Ann Arbor, United States
4 h-index
11 publications
649 citations
Fuji Electric (Japan)
Tokyo, Japan
4 h-index
16 publications
336 citations
1–8 of 193
18 publications · 1K citations
18
h-index
19 publications · 1.1K citations
17
h-index
7 publications · 252 citations
7
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6 publications · 177 citations
6
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5 publications · 175 citations
5
h-index
1–5