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Switching Performance Analysis of 3.5 kV Ga<sub>2</sub>O<sub>3</sub> Power FinFETs
20
Citations
28
References
2020
Year
Device ModelingElectrical EngineeringSimulated Electric FieldEngineeringPerformance AnalysisEnergy EfficiencyFf FinfetPower Optimization (Eda)Power DevicePower Semiconductor DeviceCircuit SimulationPower Electronic SystemsModeling And SimulationPower ElectronicsPower SystemsPower Electronic Devices
This article presents switching performance analysis of a normally-off 3.5 kV <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula> -Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> power FinFET using Silvaco TCAD simulation platform. The simulated electric field and OFF-state capacitances at a drain voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {D}}{)}$ </tex-math></inline-formula> of 3.5 kV were compared for FinFETs with two different structures: (i) 30-nm-thick Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> in the planar regions and partially-filled (PF) inter-fin areas and (ii) 130-nm-thick Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> in the planar regions and fully-filled (FF) inter-fin areas. The FF FinFET showed a smaller OFF-state <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {GS}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {GD}}$ </tex-math></inline-formula> and the thicker Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> significantly reduced peak electric field at the corner of the fin. Therefore, via TCAD device-circuit-integrated model, the impact of electron mobility in the MOS channel, bulk fin and drift region, and the substrate thickness on the device switching performances were investigated on a single-fin FF FinFET structure. The device with 100- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> -thick substrate and ideal drift region and fin mobilities of 180 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs showed 82.6% improvement in the total switching time and 82.2% lower switching losses compared with the device which had thicker substrate thickness ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$600~\mu \text{m}$ </tex-math></inline-formula> ) and lower electron mobilities in the drift region (130 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs), bulk fin (30 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs), and MOS channel (2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs). Moreover, the switching performance of multifin FF FinFETs with different fin width/pitch ratio was studied. At a given pitch size of 700 nm, the total power loss of the input power at a frequency of 200 kHz was reduced from 0.83% to 0.61% as pitch ratio reduced from 57.1% to 14.3%. These findings provide helpful insights for design and fabrication of Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> FinFETs with enhanced switching performance for low-waste power conversion applications.
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