Exploring a Machine Learning Approach to Performance Driven Analog IC Placement

Abstract

Analog IC layout is usually a time-consuming manual design process. Although automated analog IC layout has been studied for decades, most of the previous works are focused on geometric constraints. As a result, there is often a performance gap compared to manual designs, which prevents the automated tools from wide applications. The recent progress on machine learning technology offers an opportunity for solving this problem. In this work, several machine learning techniques are investigated for analog IC performance prediction, which is further applied for performance driven placement. Simulation results from several amplifier designs indicate that the proposed approach can achieve performance similar to manual layout but is orders of magnitude faster.