Analog Layout Techniques
Analog Layout Techniques is a systematic methodology within integrated circuit design that specifically addresses the physical arrangement and interconnection of analog components to optimize performance, matching, and immunity to noise, distinguishing it from digital or mixed-signal layout approaches by its emphasis on device symmetry, parasitic control, and signal integrity in continuous-domain circuits.
188
Publications
6.4K
Citations
436
Authors
159
Institutions
Publications per year
2017–2026
22
188
Improved implementation of the silicon cochlea
Lloyd Watts, Douglas Kerns, Richard F. Lyon et al. · IEEE Journal of Solid-State Circuits · 1992 · 163 citations
1–5 of 188
436
11
h-index
8
h-index
University of California, Berkeley, United States
8 publications · 447 citations
8
h-index
8
h-index
7
h-index
1–5 of 436
159
Carnegie Mellon University
Pittsburgh, United States
10 h-index
34 publications
2.1K citations
KU Leuven
Leuven, Belgium
8 h-index
16 publications
536 citations
The University of Texas at Austin
Austin, United States
7 h-index
45 publications
1.9K citations
Chinese University of Hong Kong
Hong Kong, Hong Kong
7 h-index
21 publications
883 citations
University of California, Berkeley
Berkeley, United States
6 h-index
13 publications
550 citations
University of Washington
Seattle, United States
5 h-index
14 publications
367 citations
Technical University of Munich
Munich, Germany
5 h-index
11 publications
196 citations

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
5 h-index
9 publications
226 citations
1–8 of 159
12 publications · 976 citations
12
h-index
11 publications · 799 citations
11
h-index
7 publications · 206 citations
7
h-index
4 publications · 114 citations
4
h-index
3 publications · 126 citations
3
h-index
1–5