Wafer-Scale Si–GaN Monolithic Integrated E-Mode Cascode FET Realized by Transfer Printing and Self-Aligned Etching Technology

Abstract

In this article, Si (100) inks' array is integrated on SiN/AlGaN/GaN substrate to demonstrate a zero deviation and wafer-scale Si-GaN monolithic integration by transfer printing and self-aligned etching technology. During the heterogeneous integration process, it does not depend on any equipment, such as metal-organic chemical vapor deposition (MOCVD) (epitaxial growth) and wafer bonding machine (wafer bonding) which are costly. The transferred Si and SiN/AlGaN/GaN substrates show an excellent interface morphology. Based on this material system, the monolithic integrated E-mode cascode FETs are demonstrated with good uniformity. The I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> is below 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-5</sup> mA/mm within a large gate voltage swing of ±18 V. Threshold voltages of a series of cascode FETs are extracted as 2.2 V (±0.2 V). This novel low-cost technology shows great potential in monolithic heterogeneous integration.