IEEE Transactions on Electron Devices · 2019 · 47 citations · 19 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesSystem-on-chip DesignDevice ModelingIntegrated Circuit DesignInterconnect DesignNetwork-on-chip DesignNoise In Semiconductor DevicesPhysical DesignNoise AnalysisPower Delivery Network DesignPower IntegrityResistivitySignaling Network ModelingSiliconThrough-silicon Via DesignThrough-silicon Vias
In this article, a power delivery network (PDN) modeling framework for backside-PDN configurations is presented. A backside-PDN configuration contains dense microthrough silicon vias (μTSVs) and power/ground metal stack on the backside of the die. This approach separates the PDN from a conventional signaling network of the back-end-of-the-line (BEOL) and improves power integrity and core utilization. We benchmark this technology with conventional front-side BEOL PDN configurations. Owing to the lower resistivity compared with Cu metal lines for advanced technology nodes, we use ruthenium (Ru)-based buried power rail for PDN modeling. Our analysis shows that the steady-state IR-drop reduces by more than 4× in the backside-PDN configuration, and a simultaneous switching noise analysis shows a significant reduction in transient droops. The framework results are validated with a place-and-route (P&R)-based physical implementation flow. We quantify the area improvement in the actual flow and observe 25%-30% improvement in the backside-PDN configuration. From a PDN modeling framework, the PDN results follow a trend similar to the ones obtained from the block-level P&R of the given configurations. Moreover, we investigate the impacts of package-to-die interconnect pitch, metal-insulator-metalcap density, and input pulse on the PDN performance. In addition, we perform thermal modeling to analyze the thermal implications of the backsidePDN configuration. From a thermal modeling perspective, there is negligible influence from a dielectric bonding layer in the backside-PDN configuration.
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A reconfigurable fabric for accelerating large-scale datacenter services
Andrew Putnam, Adrian M. Caulfield, Eric S. Chung et al. · 2014 · 570 citations · Full text
C. Auth, A. Aliyarukunju, M. Asoro et al. · 2017 · 369 citations
Engineering, Computer Engineering, Electrical Engineering +17