Concepedia

M. Asoro

MA

3

Publications

445

Citations

3

H-Index

2017

Active since

Affiliations

Intel (United States)(Current)

M. Asoro is an author at Intel (United States) specializing in computer engineering, electrical engineering, and microelectronics.

Top concepts

Publications per year

2017–2023

3

Publications

3

A 10nm high performance and low-power CMOS technology featuring 3<sup>rd</sup> generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconnects

C. Auth, A. Aliyarukunju, M. Asoro et al. · 2017 · 353 citations

, , +18

Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing

W. Hafez, Prashant Agnihotri, M. Asoro et al. · 2023 · 58 citations

, , +16

Interconnect Stack using Self-Aligned Quad and Double Patterning for 10nm High Volume Manufacturing

A. Yeoh, Advait Madhavan, Nicholas Kybert et al. · 2018 · 34 citations

, , +20

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