In Situ Thermal Atomic Layer Etching for Sub-5 nm InGaAs Multigate MOSFETs

Abstract

Thermal atomic layer etching (ALE) was demonstrated on ternary III-V compound semiconductors. In particular, thermal ALE on InGaAs and InAlAs was achieved with sequential, self-limiting fluorination and ligand-exchange reactions using hydrogen fluoride (HF) as the fluorination reactant and dimethylaluminum chloride (DMAC) as the ligand-exchange reactant. Thermal ALE was investigated on planar surfaces and three-dimensional nanostructures. The measured radial etch rates on In_0.53Ga_0.47As and In_0.52Al_0.48As vertical nanowires (VNWs) at 300 °C were 0.24 and 0.62 Å/cycle, respectively. An optimized thermal ALE process did not increase the surface roughness after 200 cycles. The etching process also displayed selectivity and orientation dependence. This new thermal ALE process in combination with in situ atomic layer deposition (ALD) was used to fabricate InGaAs gate-all-around structures with minimum width down to 3 nm. The in situ ALE-ALD process produced a sharp vertical MOS interface. Finally, the merits of thermal ALE were demonstrated in the fabrication of n-channel InGaAs FinFETs with record ON-state and OFF-state transistor performance. On the basis of this transistor demonstration, thermal ALE shows great promise for high-volume device manufacturing.