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Short Circuit Capability and Short Circuit Induced $V_{\mathrm{TH}}$ Instability of a 1.2-kV SiC Power MOSFET
65
Citations
30
References
2019
Year
Electrical EngineeringWithstand CapabilityEngineeringSemiconductor DeviceHigh Voltage EngineeringPower DeviceShort Circuit CapabilityPower Semiconductor DeviceSingle Event EffectsShort Circuit InducedPower ElectronicsDevice ReliabilityMicroelectronicsSic MosfetsRepetitive Short CircuitPower Electronic Devices
The withstand capability and threshold voltage (VTH) instability of 1.2-kV silicon carbide (SiC) MOSFETs under repetitive short circuit (SC) tests are investigated. An SC test system is constructed to apply repetitive SC stress to SiC MOSFETs and measure the transfer I-V characteristics and gate-to-source leakage current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GSS</sub> ) after each set of SC tests. To evaluate the SC capability, repetitive SC tests with different SC durations (t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> ) are conducted until device failure. The SC withstand time (SCWT) at 1000 SC cycles is found to be ~3.3 μs. V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> instability under repetitive SC tests prior to the device failure is characterized. A bidirectional V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shift behavior, i.e., negative shift at shorter t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> and positive shift at longer t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> , was revealed. The V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shifts under repetitive SC tests are attributed to the SC pulse process according to the results of high-temperature reverse bias (HTRB) and dynamic high-temperature gate bias (HTGB) tests. The underlying mechanisms of the complex V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shift behavior are explained in a unified framework by taking into account the junction temperature (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</sub> ) increase with longer t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> . TCAD device simulation is used to help analyze the mechanisms.
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