Publication | Closed Access
Si/InP Heterogeneous Integration Techniques from the Wafer-Scale (Hybrid Wafer Bonding) to the Discrete Transistor (Micro-Transfer Printing)
11
Citations
7
References
2018
Year
Unknown Venue
EngineeringDevice IntegrationMicro-transfer PrintingIntegrated CircuitsInterconnect (Integrated Circuits)Wafer Scale ProcessingRf SemiconductorAdvanced Packaging (Semiconductors)NanoelectronicsHeterogeneous IntegrationElectronic PackagingMaterials ScienceElectrical EngineeringDiscrete TransistorSemiconductor Device FabricationMicroelectronicsIndividual Transistor LevelHybrid Wafer BondingHybrid BondingThree-dimensional Heterogeneous IntegrationMicrofabricationApplied PhysicsOptoelectronicsIndium Phosphide
Compound semiconductor heterogeneous integration with silicon electronics offers new design opportunities for high performance microsystems. The indium phosphide (InP) material system is an attractive candidate for heterogeneous integration of both electronic and optoelectronic devices. For RF and mixed-signal integrated circuit (IC) applications, InP transistors offer the highest reported RF figures-of-merit, low transistor noise figure and high RF power density. We report on InP heterogeneous integration techniques performed at the wafer-scale using hybrid bonding and at the individual transistor level using micro-transfer printing. Both integration techniques maintain the native substrate transistor performance and have been used to demonstrate high performance millimeter-wave ICs (RF beamformers and power amplifiers).
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