IEEE Embedded Systems Letters · 2018 · 23 citations · 12 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingConfigurable Logic BlocksField-programmable Gate Array ArchitectureFpga ArchitectureLookup TablesMemory Subsystem DesignRegister-transfer Level DesignContent-addressable MemoryContent-addressable Memory (Cam)Control Signal GenerationField-programmable Gate Arrays (Fpgas)Random-access MemoryRegistersStatic Random-access MemoryStatic Random-access Memory Design
This letter proposes a novel approach to design a ternary content-addressable memory (TCAM) on a field-programmable gate array (FPGA). The proposed architecture uses slice registers (SRs) for storage instead of lookup tables and static random-access memory, and a control signal in place of a memory element to accommodate a don’t care state. The proposed architecture is implemented on Xilinx Virtex-6 FPGA. Compared with the latest prior work, the proposed TCAM reduces the number of SRs by 50.04% while not compromising on throughput.
12