Manish Kumar Jaiswal

Author

City University of Hong Kong ORCID

Also Known As

Manish Jaiswal, Manish K. Jaiswal, Manish Kumar Jaiswal

Publications

755

Citations

H-Index

Concepts

All Affiliations

City University of Hong Kong University of Hong Kong Indian Institute of Technology Delhi CECOS University

About

Manish Kumar Jaiswal is an author at City University of Hong Kong specializing in parallel computing, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	13	15	522
2	Computer Engineering	13	15	522
3	Computer Science	12	13	455
4	Computer Architecture	12	14	507
5	Electrical Engineering	2	2	138

Manish Kumar Jaiswal

Publications

667

Citations

H-Index

Page 1

	Year	Citations
PACoGen: A Hardware Posit Arithmetic Core Generator Manish Kumar Jaiswal, Hayden Kwok‐Hay So IEEE Access	2019	92
Z-TCAM: An SRAM-based Architecture for TCAM Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung IEEE Transactions on Very Large Scale Integration (VLSI) Systems Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyComputer Architecture	2014	86
FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture Manish Kumar Jaiswal, Nitin Chandrachoodan IEEE Transactions on Computers Hardware SecurityFpga-based High-performanceArray ComputingEngineeringHardware Acceleration	2011	63
Universal number posit arithmetic generator on FPGA Manish Kumar Jaiswal, Hayden Kwok‐Hay So Hardware SecurityReal Data TypePosit Number SystemEngineeringHardware Acceleration	2018	55
E-TCAM: An Efficient SRAM-Based Architecture for TCAM Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung Circuits Systems and Signal Processing Hardware SecurityEngineeringEfficient Sram-based ArchitectureComputer EngineeringComputer Architecture	2014	52
UE-TCAM: An ultra efficient SRAM-based TCAM Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung, Hardware SecurityNon-volatile MemoryElectrical EngineeringMemory ArchitectureEngineering	2015	52
Architecture Generator for Type-3 Unum Posit Adder/Subtractor Manish Kumar Jaiswal, Hayden Kwok‐Hay So EngineeringArchitecture GeneratorHardware AlgorithmComputer ArchitectureGeneric Programming	2018	49
FPGA Implementation of SRAM-based Ternary Content Addressable Memory Zahid Ullah, Manish Kumar Jaiswal, Y.C. Chan, Hardware SecurityNon-volatile MemoryContent Addressable MemoryFpga ImplementationEngineering	2012	33
Area-efficient architectures for double precision multiplier on FPGA, with run-time-reconfigurable dual single precision support Manish Kumar Jaiswal, Ray C. C. Cheung Microelectronics Journal	2013	29
Fast Content Updating Algorithm for an SRAM-Based TCAM on FPGA Farkhanda Syed, Zahid Ullah, Manish Kumar Jaiswal IEEE Embedded Systems Letters Hardware SecurityNon-volatile MemoryTernary Content-addressable MemoryEngineeringHardware Acceleration	2017	29

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