Manish Kumar Jaiswal

PACoGen: A Hardware Posit Arithmetic Core Generator

Manish Kumar Jaiswal, Hayden Kwok‐Hay So · IEEE Access · 2019 · 92 citations · Full text

Z-TCAM: An SRAM-based Architecture for TCAM

Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 86 citations

Non-volatile Memory, Engineering, Memory Design +19

FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture

Manish Kumar Jaiswal, Nitin Chandrachoodan · IEEE Transactions on Computers · 2011 · 63 citations

Hardware Security, Fpga-based High-performance, Array Computing +13

Universal number posit arithmetic generator on FPGA

Manish Kumar Jaiswal, Hayden Kwok‐Hay So · 2018 · 55 citations

Hardware Security, Real Data Type, Posit Number System +13

E-TCAM: An Efficient SRAM-Based Architecture for TCAM

Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung · Circuits Systems and Signal Processing · 2014 · 52 citations

Hardware Security, Engineering, Efficient Sram-based Architecture +5