Robust SiN_x/GaN MIS-HEMTs With Crystalline Interfacial Layer Using Hollow Cathode PEALD

Abstract

In this letter, we report gallium nitride-based metal-insulator-semiconductor high-electron-mobility transistors (GaN MIS-HEMTs) with a 16-nm-thick silicon nitride (SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) gate insulator and surface passivation layer grown using low-temperature (300 °C) hollow cathode plasma-enhanced atomic layer deposition. Tris(dimethylamino) silane and a remote N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> plasma were used as the silicon precursor and the nitrogen co-reactant, respectively. Though the growth temperature was as low as 300 °C, we obtained excellent film properties such as a high refractive index (2.00), a high film density (2.9 g/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ), and a low wet etch rate (0.8 nm/min)in 100:1 hydrofluoric acid. High-resolution transmission electron microscopy images of the gate stacks showed ~1.5 nm β-phase Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> crystalline interfacial layer on the GaN surface. The devices showed a negligible hysteresis of ~50 mV, a steep subthreshold slope of 76 mV/dec, and a high <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON/OFF</sub> drain current ratio of ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> . In addition, the devices showed a small positive/negative bias temperature threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) instability (ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ≤ 0.2 V at 25 °C and 150 °C) as well as a mitigated current collapse under an off-state quiescent V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> of 20 V.