Flip Chip Packaging of Digital Silicon Photonics MEMS Switch for Cloud Computing and Data Centre

Abstract

We report on the flip chip packaging of Micro-Electro-Mechanical System (MEMS)-based digital silicon photonic switching device and the characterization results of 12 × 12 switching ports. The challenges in packaging N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> electrical and 2N optical interconnections are addressed with single-layer electrical redistribution lines of 25 μm line width and space on aluminum nitride interposer and 13° polished 64-channel lidless fiber array (FA) with a pitch of 127 μm. 50 μm diameter solder spheres are laser-jetted onto the electrical bond pads surrounded by suspended MEMS actuators on the device before fluxless flip-chip bonding. A lidless FA is finally coupled near-vertically onto the device gratings using a 6-degree-of-freedom (6-DOF) alignment system. Fiber-to-grating coupler loss of 4.25 dB/facet, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> bit error rate (BER) through the longest optical path, and 0.4 μs switch reconfiguration time have been demonstrated using 10 Gb/s Ethernet data stream.