Using Mixed-Signal Defect Simulation to Close the Loop Between Design and Test

Abstract

By the time volume production test statistics are known, it is usually uneconomical to significantly modify a mixed-signal design to improve test cost or coverage, or to add redundancy to improve yield or reliability. Fault simulation could provide immediate feedback to designers about the impact of design on test time, test cost, and test coverage of manufacturing defects, but simulating all potential defects in a mixed-signal circuit is usually not practical. This paper first summarizes previous fault simulators and likelihood-weighted random sampling theory. It then describes a defect simulator developed for industrial mixed-signal circuits. The mixed-mode simulator simulates realistic random defectivity, and reports likelihood-weighted defect coverage based on user-provided likelihoods for opens, shorts, and excessive variations, and for user-defined defects. A variety of techniques is described that reduces total defect simulation time. We provide two small circuit examples to illustrate how test coverage was measured for circuits in pre-production ICs. An additional benefit of defect simulation is measurement of a circuit's defect tolerance, whether the tolerance is added to improve reliability or yield.