IEEE Journal of Solid-State Circuits · 2016 · 35 citations · 19 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsLow-noise Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital ConvertersBackground CalibrationCmos Analog Integrated CircuitsCmos ScalingVoltage-controlled OscillatorsVoltage-to-frequency Conversion
This paper presents a scaling friendly mostly digital voltage-controlled-oscillator (VCO)-based 0-1 multistage noise shaping (MASH) analog-to-digital converter. A novel background calibration technique corrects conversion errors due to VCO linear gain drift, residue generating digital-to-analog converter mismatches, and nonlinearity of the VCO voltage-to-frequency conversion. The proposed architecture minimally modifies the basic 0-1 MASH architecture and directly calibrates the main VCOs without relying on replica matching. A redundant first-stage coarse quantizer enables fast error estimation in the digital domain. A 12-b prototype implemented in 180-nm CMOS achieves 12-b ENOB over 2.5 MHz and consumes 4.8 mW from a 1.8 V supply.
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Matthew Park, Michael H. Perrott · IEEE Journal of Solid-State Circuits · 2009 · 213 citations · Full text