Karthikeyan Reddy

A 16-mW 78-dB SNDR 10-MHz BW CT $\Delta \Sigma$ ADC Using Residue-Cancelling VCO-Based Quantizer

Karthikeyan Reddy, Sachin Rao, Rajesh Inti et al. · IEEE Journal of Solid-State Circuits · 2012 · 115 citations

Second Stage, Engineering, Data Converter +11

Fundamental Limitations of Continuous-Time Delta–Sigma Modulators Due to Clock Jitter

Karthikeyan Reddy, Shanthi Pavan · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 2007 · 92 citations

Flat Ntfs, Jitter Noise, Engineering +12

A Deterministic Digital Background Calibration Technique for VCO-Based ADCs

Sachin Rao, Karthikeyan Reddy, Brian Young et al. · IEEE Journal of Solid-State Circuits · 2014 · 90 citations

Engineering, Calibration, Data Converter +11

A Highly Digital VCO-Based ADC Architecture for Current Sensing Applications

Praveen Prabha, Seong Joong Kim, Karthikeyan Reddy et al. · IEEE Journal of Solid-State Circuits · 2015 · 74 citations

Current Sensing Applications, Electrical Engineering, Engineering +9

A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer

Karthikeyan Reddy, Sachin Rao, Rajesh Inti et al. · 2012 · 43 citations

Nonlinear Circuit, Data Converter, Mixed-signal Integrated Circuit +7