Reuse of Substrate Wafers for the Porous Silicon Layer Transfer

Abstract

The reuse of the silicon substrate is a key component in the kerfless-porous-silicon-based wafering process. Starting with a boron-doped p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -type substrate, a porous double layer is created, reorganized in a hydrogen bake, and then serves as a substrate for silicon homoepitaxy. After lift-off, the silicon substrate is wet chemically reconditioned and reporosified to serve again as a substrate for epitaxial layer deposition. We reduce the substrate consumption per cycle to 5 ± 0.3 μm/side and demonstrate 14 uses on a 6-in wafer. We investigate the impact of the reuse sequence on the epitaxial layer quality by carrier lifetime measurements. Starting with the third reuse, a pattern becomes visible in lifetime mappings. We observe a degradation of the minority carrier lifetime from 15 to 7 μs after 13 reuses.