Uniformity Improvement in 1T1R RRAM With Gate Voltage Ramp Programming

Abstract

Uniformity is one of the most severe challenges for resistive random access memory (RRAM). In this letter, a novel programming scheme with gate voltage ramping (GVR) is proposed to improve the uniformity of RRAM in a one transistor and one resistor structure. In traditional operation, the gate of the access transistor is biased with a constant voltage and a sweeping voltage is applied to the source or drain during the SET (from HRS to LRS) and RESET (from LRS to HRS) processes. With the GVR scheme, the gate voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> is ramped and the source/drain are kept constant. A tight distribution of HRS can be achieved using GVR. Analysis of power generation in the RESET process of the GVR scheme reveals positive feedback from joule heating, which helps to accelerate filament rupture and results in a tendency to achieve full RESET. The intermediate resistance states commonly observed are effectively eliminated.