Path Based Timing Validation for Timed Asynchronous Design

Abstract

Timing is an important parameter necessary to ensure the correctness of a design. Timed asynchronous designs can have complex timing paths that include combinational cycles. Commercial electronic design automation (EDA) tools do not support asynchronous designs because timing graphs are required to be acyclic. This paper reports on a methodology that enables commercial tools to support full cyclic path timing validation of timed asynchronous designs.