IEEE Journal of Solid-State Circuits · 1978 · 13 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesDynamic Power ReductionLow-power Digital Circuit DesignMemory DevicesMemory Subsystem DesignHigh PerformanceLow-power Memory ArchitectureLow-power Memory CircuitsMemory Circuit DesignMemory CircuitsPower-efficient Memory DesignRandom Access Memory (Ram)Static Random-access Memory Design
Describes a 4096-word by 1-bit TTL static bipolar RAM with a typical address access time of 25 ns and power dissipation of 350 mW. Emphasis is given to circuit techniques which made the high performance possible. These techniques are: variable impedance cell (VIC) with low standby current capable of fast switching of digit lines, cell margin increasing circuitry which increases the operating margin of the cell with low standby current, sharing of only one pair of read current sources by 64 pairs of digit lines, and Darlington word drivers causing fast switching of word lines. The process and device structure are mentioned briefly.
3
A 1024-bit ECL RAM with 15-ns access time
R. Rathbone, H. Ernst, Hans-Walter Glock et al. · 1976 · 22 citations
Engineering, Computer Engineering, Electrical Engineering +14
W. Herndon, W. Ho, Rolando Ramirez · 1977 · 10 citations
Engineering, Computer Engineering, Electrical Engineering +14