Extrinsic Gettering via Epitaxial Misfit Dislocations: Electrical Characterization

Abstract

The electrical properties of undoped silicon epitaxial layers, extrinsically gettered by interfacial misfit dislocations in underlying Ge‐doped Si layers, are presented. These results verify the efficiency and viability of this externally controlled gettering technique and are consistent with microscopic and chemical observations previously reported for intentionally contaminated material. The electrical measurements include diode leakage current, mobility, and minority‐carrier lifetime. The improvements in these parameters for extrinsically gettered Si, as compared to standard epitaxial samples, have been clearly demonstrated and are attributed to gettering of residual impurities. The electrical results also indicate that the Si surface device function is not vitiated by the buried interfacial defect layer or the occurrence of threading dislocations. Controlling the density and location (in‐depth) of the misfit dislocations via the Ge concentration and the undoped Si capping layer thickness was found to have a strong influence on the electrical properties.