IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009 · 280 citations · 25 references
EngineeringVlsi DesignNbti EffectIntegrated CircuitsHardware SystemsCombinational CircuitCircuit SystemNegative-bias-temperature InstabilityAsynchronous CircuitsDevice ModelingElectrical EngineeringHardware ReliabilityBias Temperature InstabilityComputer EngineeringMicroelectronicsCircuit DesignCircuit Performance DegradationCircuit ReliabilityDegradation RateCircuit Simulation
Negative‑bias‑temperature instability (NBTI) is the primary limiting factor of circuit lifetime. The paper develops a hierarchical framework to analyze how NBTI affects logic circuit performance across varying supply voltage, temperature, and switching activity. The framework includes an efficient method that predicts long‑term circuit speed degradation from topology and switching activity, and evaluates interactions with process and design uncertainties. The method is validated on ISCAS benchmarks and a 65‑nm industrial design, revealing that NBTI degradation is largely temperature‑dependent, has an optimal supply voltage, is highly sensitive to input vectors, and can cause up to five‑fold differences in delay degradation.
Negative-bias-temperature instability (NBTI) has become the primary limiting factor of circuit life time. In this paper, we develop a hierarchical framework for analyzing the impact of NBTI on the performance of logic circuits under various operation conditions, such as the supply voltage, temperature, and node switching activity. Given a circuit topology and input switching activity, we propose an efficient method to predict the degradation of circuit speed over a long period of time. The effectiveness of our method is comprehensively demonstrated with the International Symposium on Circuits and Systems (ISCAS) benchmarks and a 65-nm industrial design. Furthermore, we extract the following key design insights for reliable circuit design under NBTI effect, including: 1) During dynamic operation, NBTI-induced degradation is relatively insensitive to supply voltage, but strongly dependent on temperature; 2) There is an optimum supply voltage that leads to the minimum of circuit performance degradation; circuit degradation rate actually goes up if supply voltage is lower than the optimum value; 3) Circuit performance degradation due to NBTI is highly sensitive to input vectors. The difference in delay degradation is up to 5× for various static and dynamic operations. Finally, we examine the interaction between NBTI effect, and process and design uncertainty in realistic conditions.
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