National Conference on Artificial Intelligence · 1983 · 40 citations · 3 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureFormal MethodsHardware Description LanguagesDeductive VerificationEquivalence CheckingModel CheckingVerificationCorrectness CheckingCorrectness ProofsFormal Hardware VerificationHardware Equivalence CheckingHardware Model CheckingHardware VerificationLogic Verification
VERIFY is a PROLOG program that attempts to prove the correctness of a digital design. It does so by showing that the behavior inferred from the interconnection of its parts and their behaviors is equivalent to the specified behavior. It has successfully verified large designs involving many thousands of transistors.
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