International Conference on Computer Aided Design · 1992 · 11 citations · 13 references
EngineeringComputer EngineeringDesign AutomationSchedulingTest DevelopmentCritical Path AnalysisDesign For TestabilityArea Overhead AnalysisBehavioral SynthesisFault CoverageFault Coverage AnalysisHeuristic SchedulingTest GenerationTestabilityTestability Engineering
This paper presents a data path scheduling algorithm to improve testability without a priori assuming any particular test strategy. We introduce a scheduling heuristic for easy testability, based on our previous work [I51 on data path allocation for testability. We then develop a mobility path scheduling algorithm to implement this heuristic while also minimizing area. Experimental results on benchmark and ezample circuits show high fault coverage, short test generation time, and little or no area overhead.
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Sequential circuit design using synthesis and optimization
Ellen Sentovich, K.J. Singh, Cho W. Moon et al. · 2003 · 615 citations