High current-density beta diminution

Abstract

This paper discusses methods for discriminating among various possible current-gain falloff mechanisms at high current densities. It is shown that although various mechanisms can predominate, well designed silicon transistors are usually limited by emitter efficiency. This is demonstrated experimentally for a variety of structures and values are given for the emitter saturation current density. Design rules for tradeoffs among current gain, basewidth, and emitter stripewidth are adumbrated.