High-Voltage Self-Aligned p-Channel DMOS-IGBTs in 4H-SiC

Abstract

SiC power MOSFETs designed for blocking voltages of 10 kV and higher face the problem of high drift layer resistance that gives rise to a high internal power dissipation in the ON -state. For this reason, the ON-state current density must be severely restricted to keep the power dissipation below the package limit. We have designed, optimized, and fabricated high-voltage SiC p-channel doubly-implanted metal-oxide-semiconductor insulated gate bipolar transistors (IGBTs) on 20-kV blocking layers for use as the next generation of power switches. These IGBTs exhibit significant conductivity modulation in the drift layer, which reduces the ON-state resistance. Assuming a 300 W/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> power package limit, the maximum currents of the experimental IGBTs are 1.2x and 2.1x higher than the theoretical maximum current of a 20-kV MOSFET at room temperature and 177 degC, respectively.