IEEE Transactions on Electron Devices · 2004 · 109 citations · 9 references
EngineeringElectrical EngineeringElectronic MaterialsSemiconductor DevicesVlsi DesignCmos Circuit DesignDevice ScalingIntegrated Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Device MaterialsShort-channel EffectsChannel EngineeringChannel Length ScalingPower MosfetsSelf-aligned ProcessesSelf-aligned Structures
In this paper, we describe a self-aligned process to produce short-channel vertical power DMOSFETs in 4H-SiC. By reducing the channel length to /spl les/0.5 /spl mu/m, the specific on-resistance of the MOSFET channel is proportionally reduced, significantly enhancing performance.
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