Publication | Closed Access
Multiple-Bit Upset Analysis in 90 nm SRAMs: Heavy Ions Testing and 3D Simulations
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Citations
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References
2007
Year
Multiple-bit Upset AnalysisNon-volatile MemoryEngineeringComputer ArchitectureDefect ToleranceMulti-channel Memory ArchitectureMbu RatesInstrumentationMbu Cross-sectionsElectrical EngineeringPhysicsBias Temperature InstabilityNm SramsComputer EngineeringAtomic PhysicsMicroelectronicsMemory ArchitectureSilicon DebuggingSemiconductor MemoryHeavy Ions
SEU and MBU cross-sections are measured with heavy ions for commercial 90 nm single port and dual port SRAMs. SEU and MBU rates are discussed as a function of the LET and beam tilt. A new sensitive area devoted to MBU is computed with full 3D TCAD simulations on single and adjacent memory cells.
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