Publication | Closed Access
New Observation of Mobility and Reliability Dependence on Mechanical Film Stress in Strained Silicon CMOSFETs
10
Citations
16
References
2008
Year
Strained Silicon CmosfetsEngineeringReliability CharacteristicsIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)NanoelectronicsElectronic PackagingReliability DependenceElectrical EngineeringBias Temperature InstabilityMechanical Film StressFilm StressSemiconductor Device FabricationDevice ReliabilityMicroelectronicsStress-induced Leakage CurrentApplied PhysicsCircuit ReliabilityThin FilmsMechanics Of MaterialsDc Device Performance
This paper shows that dc device performance and reliability characteristics of CMOSFETs do not have the same dependence on the film stress of contact etch stopping layers (CESLs) in strained silicon technology. Two kinds of CESLs, namely, plasma-enhanced chemical vapor deposition (PE-CVD) SiN and low-pressure CVD SiON, with tensile and compressive stresses, respectively, were used to induce channel stress. To further analyze the effects of stress, the film stress of PE-CVD SiN was intentionally split into compressive stress and tensile stress. It is shown that the initial D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> of NMOS with a tensile stress film is less than that with a compressive stress, whereas in the case of PMOS, compressive stress demonstrated less D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> than the tensile-stress film. However, device degradation by hot and cold carriers is heightened more by tensile stress than by compressive stress for both NMOS and PMOS. Therefore, the compressive stress is desirable to improve hot-carrier immunity in NMOSFETs, whereas the tensile stress is necessary to improve the dc device performance. Hence, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.
| Year | Citations | |
|---|---|---|
Page 1
Page 1