Implementation analysis of NoC

Abstract

This paper proposes to tackle Networks-on-chip design for MPSoC on the assumption that area and power overhead control is the primary goal. Analysis of topologies and routing strategies is performed by comparing two approaches, the wormhole and hot potato, both theoretically and using real synthesized data in 0.13μm technology. It is shown that the hot potato solution is competitive and possibly better for both occupation and dissipation, while its performance, measured by simulation on real multiprocessor traces, is not worse than the wormhole case.