On-chip Networks
On-Chip Networks is a communication architecture that interconnects components within an integrated circuit through a structured, packet-switched network, distinguishing it from traditional bus-based or point-to-point interconnects by enabling scalable and modular data transfer in multiprocessor systems-on-chip.
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2017–2026
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Network-on-chipNetworks-on-chip
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William J. Dally, Brian Towles · 2001 · 3.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
Patrice Godefroid, Nils Klarlund, Koushik Sen · ACM SIGPLAN Notices · 2005 · 2.1K citations
Patrice Godefroid, Nils Klarlund, Koushik Sen · 2005 · 1.5K citations
A network on chip architecture and design methodology
Shashi Kumar, Axel Jantsch, Juha-Pekka Soininen et al. · 2003 · 1.2K citations
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Carnegie Mellon University
Pittsburgh, United States
30 h-index
51 publications
4.7K citations
Princeton University
Princeton, United States
29 h-index
37 publications
5.7K citations
Stanford University
Stanford, United States
27 h-index
37 publications
8.1K citations
Intel (United States)
Santa Clara, United States
24 h-index
32 publications
3.3K citations

KTH Royal Institute of Technology
Stockholm, Sweden
21 h-index
36 publications
2.4K citations
Massachusetts Institute of Technology
Cambridge, United States
20 h-index
28 publications
2.4K citations

University of Bologna
Bologna, Italy
20 h-index
23 publications
2K citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
19 h-index
24 publications
1.4K citations
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