On-chip Networks

On-Chip Networks is a communication architecture that interconnects components within an integrated circuit through a structured, packet-switched network, distinguishing it from traditional bus-based or point-to-point interconnects by enabling scalable and modular data transfer in multiprocessor systems-on-chip.

1.1K

Publications

65.7K

Citations

2.5K

Authors

637

Institutions

Publications per year

2017–2026

165

Variants

Network-on-chipNetworks-on-chip

Authors

2.5K

  1. LP
    Li-Shiuan Peh

    Princeton University, United States

    37 publications · 5.2K citations

    30

    h-index

  2. KG
    Kees Goossens

    Eindhoven University of Technology, Netherlands

    26 publications · 2.3K citations

    20

    h-index

  3. RM
    Radu Mărculescu

    Carnegie Mellon University, United States

    22 publications · 2.9K citations

    19

    h-index

  4. LB
    Luca Benini

    University of Bologna, Italy

    19 publications · 1.6K citations

    18

    h-index

  5. AJ
    Axel Jantsch

    KTH Royal Institute of Technology, Sweden

    25 publications · 2.4K citations

    18

    h-index

1–5 of 2.5K

Venues

  1. 21

    h-index

  2. 19

    h-index

  3. IEEE Micro

    24 publications · 3.1K citations

    18

    h-index

  4. IEEE Transactions on Computers

    21 publications · 608 citations

    17

    h-index

  5. ACM SIGARCH Computer Architecture News

    16 publications · 1.7K citations

    16

    h-index

1–5