J. Dielissen

Æthereal Network on Chip:Concepts, Architectures, and Implementations

Kees Goossens, J. Dielissen, A. Rădulescu · IEEE Design & Test of Computers · 2005 · 872 citations

Engineering, Computer Engineering, Electrical Engineering +17

Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip

E. Rijpkema, Kees Goossens, A. Rădulescu et al. · Design, Automation, and Test in Europe · 2003 · 379 citations

Engineering, Computer Engineering, Computer Science +15

A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification

Kgw Kees Goossens, J. Dielissen, O.P. Gangwal et al. · Design, Automation, and Test in Europe · 2005 · 187 citations · Full text

Engineering, Computer Engineering, Computer Science +17

Trade offs in the design of a router with both guaranteed and best-effort services for networks on chip

E. Rijpkema, Kees Goossens, A. Rădulescu et al. · 2003 Design, Automation and Test in Europe Conference and Exhibition · 2003 · 176 citations

Engineering, Computer Engineering, Computer Science +15

Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip

E. Rijpkema, Kees Goossens, A. Rdulescu et al. · IEE Proceedings - Computers and Digital Techniques · 2003 · 132 citations

Engineering, Computer Engineering, Computer Science +15