Modeling of the reverse characteristics of a-Si:H TFTs

Abstract

This paper investigates the reverse current-voltage (I-V) characteristics of inverted staggered hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs). Three mechanisms have been identified as the source of the reverse current: ohmic conduction, front channel conduction, and backchannel conduction. Ohmic conduction constitutes the physical limit for the reverse current and is due to the intrinsic conductivity of the a-Si:H and associated dielectric layers, which correlates with process integrity. The accumulation of holes and electrons at the front and back a-Si:H/a-SiN/sub x/:H interfaces, respectively, forms the basis of the other two leakage mechanisms. The relative dominance of the one or the other mechanism depends on bias conditions, TFT geometry, and process conditions. This paper identifies these sources of leakage current and examines the effect of the critical geometrical parameters (such as channel length and overlap length) and bias conditions on these leakage components. Physical models to predict bias and geometry dependences are presented for a quantitative analysis of the leakage current. Modeling results corroborate experimental observations of leakage current extracted from a large number of TFTs that are put in parallel for improved measurement accuracy. The physical parameters of the model provide a method for estimation of the significant interface and bulk properties of the structure.