An input-free V/sub T/ extractor circuit using a two-transistor differential amplifier

M. Johnson

IEEE Journal of Solid-State Circuits · 1993 · 42 citations · 2 references

Concepts

Abstract

A three-terminal circuit (power, ground, and output) that provides a DC output voltage equal to the MOS threshold voltage V/sub T/ is presented. The circuit uses the four-terminal extractor topology of Z. Wang (1992), but it adds self-biasing and a two-transistor differential amplifier to provide a ground-referenced output voltage.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

2