M. Johnson

A variable delay line PLL for CPU-coprocessor synchronization

M. Johnson, E.L. Hudson · IEEE Journal of Solid-State Circuits · 1988 · 268 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 2.5 V CMOS delay-locked loop for 18 Mbit, 500 megabyte/s DRAM

T.H. Lee, Kevin Donnelly, J. Ho et al. · IEEE Journal of Solid-State Circuits · 1994 · 178 citations

Engineering, Computer Engineering, Electrical Engineering +17

Limits on multiple instruction issue

Michael D. Smith, M. Johnson, Mark Horowitz · ACM SIGARCH Computer Architecture News · 1989 · 132 citations · Full text

Engineering, Computer Engineering, Computer Science +13

Limits on multiple instruction issue

Michael D. Smith, M. Johnson, Mark Horowitz · 1989 · 108 citations

Engineering, Computer Engineering, Computer Science +13

An input-free V/sub T/ extractor circuit using a two-transistor differential amplifier

M. Johnson · IEEE Journal of Solid-State Circuits · 1993 · 42 citations

Engineering, Electrical Engineering, Analog Electronics +14