Kevin Donnelly

Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell

Jared Zerbe, C. Werner, Vladimir Stojanović et al. · IEEE Journal of Solid-State Circuits · 2003 · 228 citations

Hardware Security, Engineering, Analog-to-digital Converter +9

A portable digital DLL for high-speed CMOS interface circuits

B.W. Garlepp, Kevin Donnelly, Jun Kim et al. · IEEE Journal of Solid-State Circuits · 1999 · 188 citations

Hardware Security, Electrical Engineering, Engineering +13

A 2.5 V CMOS delay-locked loop for 18 Mbit, 500 megabyte/s DRAM

T.H. Lee, Kevin Donnelly, J. Ho et al. · IEEE Journal of Solid-State Circuits · 1994 · 178 citations

Low-power Electronics, Electrical Engineering, Low Jitter +15

Review of the Australian curriculum final report

Kenneth Wiltshire, Kevin Donnelly · 2014 · 167 citations

Curriculum Inquiry, Reporting Authority, Education +17

A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs

Kuo‐Cheng Chang, J. Wei, Ching-Chao Huang et al. · IEEE Journal of Solid-State Circuits · 2003 · 90 citations

Low-power Electronics, Electrical Engineering, Engineering +11