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An advanced high-performance trench-isolated self-aligned bipolar technology
41
Citations
15
References
1987
Year
Electrical EngineeringElectronic DevicesEngineeringHigh-speed ElectronicsVlsi DesignAdvanced Packaging (Semiconductors)Electronic EngineeringSelf-aligned Bipolar TechnologyComputer EngineeringEcl CircuitsIntegrated CircuitsSelf-aligned CapMicroelectronicsBeyond Cmos
This paper describes the extension of "double-poly" self-aligned bipolar technology to include a silicon-filled trench with self-aligned cap oxide isolation, a p{^+} polysilicon defined epi-base lateral p-n-p, a p{^+} polysilicon defined self-aligned guard-ring Schottky-barrier diode, and p{^+} polysilicon resistors. Experimental circuits designed with 1.2-µm design rules have shown switching delays of as small as 73 ps for ECL circuits with FI = FO = 1. ISL circuits built with the same process on the same chip as the ECL circuits exhibit a sub-400-ps switching delay. The performance of the technology has also been demonstrated by a 5-kbit ECL SRAM with a 760-µm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Schottky-clamped multi-emitter cell and 1.0-ns access time.
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