Publication | Open Access
A Physical Model for Post-Breakdown Digital Gate Current Noise
12
Citations
16
References
2010
Year
Device ModelingSemiconductor TechnologyElectrical EngineeringEngineeringBd Path SwitchPhysicsPhysical ModelBias Temperature InstabilityNew Physical ModelApplied PhysicsCondensed Matter PhysicsTime-dependent Dielectric BreakdownNoiseCircuit ReliabilityMicroelectronicsUltrathin Sion DielectricsSemiconductor Device
We present a new physical model that enables us to reproduce the digital gate current random telegraph noise fluctuations observed in ultrathin SiON dielectrics in the early stages of post-breakdown (BD). Gate current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) fluctuations are modeled assuming that some traps in the BD path switch between two unstable configurations, corresponding to neutral and negatively charged O vacancies. The energy levels of the trap considered in simulations here are consistent with the values calculated from atomistic simulations. The model allows one to reproduce accurately the mean and variation in the I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> fluctuations observed on 16- and 22-Å-thick SiON gate dielectrics at different gate voltages.
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