FPGA synthesis using function decomposition

Abstract

Presents two Boolean methods for identifying common subfunctions from multiple-output functions. The first method is based on encoding the distinct columns in the stacked decomposition chart of the multiple-output function; the second method is based on the examination and encoding of all possible subfunctions that can be generated from a function with respect to a given subset of input variables. We then apply these methods to the synthesis of lookup-table based field programmable gate arrays. Experimental results are very encouraging.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>