Interface trap-enhanced gate-induced leakage current in MOSFET

Abstract

Interface traps are shown to significantly affect the gate-induced drain-leakage current in a MOSFET or gated diode. The leakage current in a p/sup +/-gated diode can increase by two orders of magnitude when the interface trap density is increased from 10/sup 11/ to 10/sup 12/ cm/sup -2/-eV/sup -1/. The fact that thermal annealing at 300 degrees C can eliminate both the generated interface traps and the excessive leakage current supports the close correlation between the two. The p/sup +/-gated diode is found to be more susceptible to this interface-trap related leakage current than the n/sup +/-device, which can be explained qualitatively by an interface-trap-assisted tunneling model.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>