A three-dimensional static RAM

Abstract

A three-dimensional (3-D) 256-bit static random-access memory (RAM) with double active layers has been fabricated by using the laser recrystallization technique. Memory cells were located in a bottom active layer with an NMOS configuration and peripheral circuits were arranged in a top active layer with a CMOS configuration. Both active layers were connected by 112 via holes. The chip and cell sizes were 2.6 × 1.9 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 50 × 70 µm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , respectively. The memory operation was observed with a supply voltage from 4 to 8 V. The shortest address access time of 42 ns was obtained at the supply voltage of 8 V.