A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm bulk CMOS

Abstract

The design and wafer probe test results of a 20 Gb/s Source-Series Terminated SerDes transmitter are presented. The integrated circuit, fabricated in a 65 nm bulk CMOS technology, transmits pre-emphasized data through the use of a 4-tap feed-forward equalizer. Transmitter output impedance is adjustable from 45 to 55 ohms. A power consumption of 167 mW at 1.1 V was measured at a transmit rate of 20 Gb/s.