Publication | Closed Access
Piezoresistance Coefficients of (100) Silicon nMOSFETs Measured at Low and High ($\sim$1.5 GPa) Channel Stress
88
Citations
22
References
2007
Year
EngineeringPiezoresistance CoefficientsMechanical EngineeringProcess-induced StressResidual StressMechanics Of MaterialsSilicon On InsulatorSemiconductor DeviceNanoelectronicsStressStressstrain AnalysisElectrical EngineeringBias Temperature InstabilitySolid MechanicsMicroelectronicsChannel StressStress-induced Leakage CurrentApplied Physics~1.5 GpaIndustrial NmosfetsHigh Strain Rate
A flexure-based four-point mechanical wafer bending setup is used to apply large uniaxial tensile stress (up to 1.2 GPa) on industrial nMOSFETs with 0 to ~700 MPa of process-induced stress. This provides the highest uniaxial channel stress to date at ~1.5 GPa. The stress altered drain-current is measured for long and short (50-140 nm) devices and the extracted pi-coefficients are observed to be approximately constant for stresses up to ~1.5 GPa. For short devices, this trend is seen only after correcting for the significant degradation in the pi-coefficients observed due to parasitic source/drain series resistances (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> d/)
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