Development of the self-aligned titanium silicide process for VLSI applications

TLDR

Scaling of gate lengths, oxide thicknesses, and junction depths makes linewidth control, etch selectivity, and profile control critical, and the self‑aligned process eliminates the complex polycide etch by using a simpler polysilicon‑only etch. The paper applies the self‑aligned titanium silicide process to 1‑µm gate length 64K SRAM NMOS VLSI circuits. The authors fabricated 64K SRAM NMOS devices using the self‑aligned titanium silicide process and compared yield and test‑structure parameters to non‑silicided devices. The self‑aligned titanium silicide process is manufacturable, produces 1.0–2.0 Ω/square gates and junctions, is compatible with VLSI NMOS and CMOS, offers significant manufacturing advantages over deposited silicide, and satisfies stringent etch requirements.

Abstract

A manufacturable self-aligned titanium silicide process which simultaneously silicides both polysilicon gates and junctions has been developed for VLSI applications. The process produces silicided gates and junctions with sheet resistances of 1.0-2.0 Ω/square. This paper describes the application of the self-aligned titanium silicide process to NMOS VLSI circuits of the 64K SRAM class with 1-µm gate lengths. Comparison of circuit yield data and test structure parameters from devices fabricated with and without the silicidation process has demonstrated that the self-aligned silicide process is compatible with both VLSI NMOS and CMOS technologies. The self-aligned titanium silicide process has some very significant manufacturing advantages over the more conventional deposited silicide on polysilicon technologies. In particular, the problems associated with etching and depositing a polycide gate stack are eliminated with the self-aligned process since the polycide etch is replaced with a much more straightforward polysilicon only etch. As gate lengths, gate oxide thicknesses, and source-drain junction depths are scaled, linewidth control, etch selectivity to the underlying gate oxide, and cross-sectional profile control become more critical. The stringent etch requirements are more easily satisfied with the self-aligned silicide process.