Circuit design guidelines for n-channel MOSFET hot carrier robustness

Abstract

Reviews present understanding of the AC stress effect in n-MOSFETs, defining and parameterizing the AC stress model. The authors incorporate the AC hot-carrier model into a circuit-level hot-carrier reliability simulator, ADHOC, that works in concert with SPICE. Sources of on-chip voltage excursions above the nominal value of the power supply V/sub dd/ are explored, and this information is used to develop a set of design guidelines at the transistor level. The hot-carrier reliability of a broad class of basic circuit building blocks is then simulated and used as the basis for a comprehensive set of design guidelines at the transistor and circuit levels.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>