2008 · 15 citations · 0 references
EngineeringComputer EngineeringElectrical EngineeringFault ToleranceMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ReliabilityIntegrated Circuit DesignLow-noise Circuit DesignMemory DevicesSemiconductor ReliabilityDevice Noise CharacterizationIntegrated Circuit NoiseLow-noise DesignNoise Analysis In Integrated CircuitsNoise In Integrated CircuitsNoise In Metal-oxide-semiconductor Field-effect TransistorsNoise Limits In Semiconductor DevicesVoltage Collapse Analysis
PVT-tolerant and supply noise tracking word-line under-drive circuit, PMOS pass device, and dynamic voltage collapse enable read and write stable Diffusion-Notch-Free (DNF) 6T SRAM cells. Measurements from a 45-nm test-chip show 26X reduction in number of single bit failures using those schemes.